A study on interconnectivity for flosolver teraflop parallel machine

Rao, Sundara G and Venkatesh, T (2008) A study on interconnectivity for flosolver teraflop parallel machine. In: Proceedings of the International Conference on Aerospace Science and Technology (INCAST 2008-124), 26-28 Jun 2008, Bangalore, India.

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Indiax2019;s first parallel computer, Flosolver Mark1 (Mk1), was developed by Flosolver Unit, National Aerospace Laboratories (NAL) in 1986[1]. Since then seven versions of parallel computers have been developed using the state-of-the-art processors and presently engaged in building the eighth version, a Tera flop parallel machine. In parallel machines connectivity plays a major role. In the year 2000 a communication device, FloSwitch, was indigenously designed, developed and used in the fifth version, Flosolver Mk5[2]. All the later developed machines are also based on this device or its updated versions. FloSwitch has its unique features like parallel read/write, broadcast write and it supports both message passing and message processing mechanism. In this paper it is about one of the possible connectivity, routing. The interconnectivity was proposed with respect to the indigenously developed FloSwitch and optical Module[2]. Flosolver uses the cluster-based architecture, Fig.1, where each cluster contains 4 nodes, each with dual processors and a PCI-DPM card[3] and these nodes are connected to the FloSwitch. FloSwitch handles the communication within the clusters and across the clusters communication will be through optical module.

Item Type: Conference or Workshop Item (Paper)
Additional Information: Copyright for this article belongs to National Aerospace Laboratories
Uncontrolled Keywords: Flosolver Mark1;FloSwitch
Subjects: AERONAUTICS > Aeronautics (General)
Depositing User: Ms. Alphones Mary
Date Deposited: 24 Mar 2009
Last Modified: 17 Jun 2010 09:21
URI: http://nal-ir.nal.res.in/id/eprint/5028

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