Effective verification and validation strategy for safety-critical embedded systems

Nanda, Manju and Jayanthi, J (2013) Effective verification and validation strategy for safety-critical embedded systems. International Journal of Software Engineering & Applications (IJSEA), 4 (2). ISSN 0975-9018

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Official URL: http://dx.doi.org/10.5121/ijsea.2013.4209


This paper presents the best practices to carry out the verification and validation (V&V) for a safety critical embedded system, part of a larger system-of-systems. The paper talks about the effectiveness of this strategy from performance and time schedule requirement of a project. The best practices employed for the V &Vis a modification of the conventional V&V approach. The proposed approach is iterative which introduces new testing methodologies apart from the conventional testing methodologies, an effective way of implementing the phases of the V&V and also analyzing the V&V results. The new testing methodologies include the random and non-real time testing apart from the static and dynamic tests. The process phases are logically carried out in parallel and credit of the results of the different phases are taken to ensure that the embedded system that goes for the field testing is bug free. The paper also demonstrates the iterative qualities of the process where the iterations successively find faults in the embedded system and executing the process within a stipulated time frame, thus maintaining the required reliability of the system. This approach is implemented in the most critical applications —-aerospace application where safety of the system cannot be compromised. The approach used a fixed number of iterations which is set to4in this application, with each iteration adding to the reliability and safety of the embedded system. Data collected and results observed are compared with a conventional approach for the same application and it is demonstrated that the strategy proposed reduces the time taken by 50% as compared to a conventional process that attains the same reliability as required in the stipulated time.

Item Type: Article
Additional Information: Copyright to this article belongs to M/s. Academy & Industry Research Collaboration Center
Uncontrolled Keywords: Verification and Validation process;Safety;Critical systems;Embedded systems;Reliability
Subjects: MATHEMATICAL AND COMPUTER SCIENCES > Computer Programming and Software
Depositing User: Ms. Alphones Mary
Date Deposited: 24 Dec 2013 09:39
Last Modified: 24 Dec 2013 09:39
URI: http://nal-ir.nal.res.in/id/eprint/11870

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