Floating point arithmetic routines for single channel microprocessor based vibration test system

Prakash, Shashikala and Balasubramaniam, R and Shankar, V (1986) Floating point arithmetic routines for single channel microprocessor based vibration test system. Technical Report. National Aeronautical Laboratory, Bangalore, India.

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    Abstract

    The architecture of the microprocessors such as 8085/Z-8O are designed to handle integer arithmetic and do not have 13; facilities to handle real numbers. In the present application the software development for the 8085/Z-80 based vibration test and analysis system calls for extensive real number representation. With this in view as well as to achieve higher dynamic range (for better resolution of the vibratory signal) development of floating point arithmetic routines almost become mandatory. This document explains in detail different floating point arithmetic routines developed for a 8085/Z-80 processor.

    Item Type: Proj.Doc/Technical Report (Technical Report)
    Uncontrolled Keywords: Floating point;Vibration;8085/Z-80
    Subjects: MATHEMATICAL AND COMPUTER SCIENCES > Mathematical and Computer Scienes(General)
    Division/Department: Structures Division, Structures Division, Structures Division
    Depositing User: Mr. Ravikumar R
    Date Deposited: 31 Aug 2006
    Last Modified: 24 May 2010 09:48
    URI: http://nal-ir.nal.res.in/id/eprint/2417

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